VSL 2014: VIENNA SUMMER OF LOGIC 2014

G4LTL-ST: Automatic Generation of PLC Programs

Authors: Chih-Hong Cheng, Chung-Hao Huang, Harald Ruess and Stefan Stattelmann

PapersPapers with AbstractsPrefaceAuthor IndexKeyword Index

Paper Information

Title:G4LTL-ST: Automatic Generation of PLC Programs
Authors:Chih-Hong Cheng, Chung-Hao Huang, Harald Ruess and Stefan Stattelmann
Proceedings:CAV 2014 LNCS Proceedings
Editors: Armin Biere, Swen Jacobs and Roderick Bloem
Keywords:Industrial automation, Linear temporal logic, Programmable logic controllers, Software synthesis, Abstraction refinement
Abstract:

ABSTRACT. G4LTL-ST automatically generates IEC 61131-3-compatible control code for industrial field-level devices from behavioral, timed specifications of input-output signals. Behavioral specifications are expressed in a linear temporal logic (LTL) extended language with (1) arithmetic constraints for describing data-intensive control behavior and (2) timers which are based on the industry standard IEC 61131-3. The code generated by G4LTL-ST is in the format of Structured Text which can readily be compiled into executable code for a large number of industrial field-level devices. The synthesis algorithm of G4LTL-ST implements a pseudo-Boolean abstraction of data constraints and a compilation of timer specifications into LTL, together with a CEGAR-like abstraction-refinement loop. Since temporal logic specifications are notoriously difficult to use in practice, G4LTL-ST includes a number of heuristics for suggesting additional environment assumptions for making the control problem at hand realizable.

Pages:7
Talk:Jul 21 12:45
Paper:
Disclaimer | Powered by EasyChair Smart Program