VSL 2014: VIENNA SUMMER OF LOGIC 2014

An Example Demonstrating the Requirement of Fully Formal Verification Method

Author: Pratima K. Shah

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Title:An Example Demonstrating the Requirement of Fully Formal Verification Method
Authors:Pratima K. Shah
Proceedings:FWFM 2014 Papers
Editor: Nikolay Shilov
Keywords:concurrency and synchronization, formal methods, proof checker, model checking
Abstract:

ABSTRACT. Concurrency and synchronization is an important behavior of hardware and software systems. Finding defects in the late phase of system development process is not acceptable anymore in industrial applications because of its highly capital investment in modern complex systems. This paper demonstrates system verification by two approaches: model checking and proof checker. Here verification of a concurrent running architecture is demonstrated in both approaches to exhibit the requirement of fully formal verification method in order to generate a better hardware and software quality. To support this, we will describe how the proof checker is used for complete verification of a system in terms of any input size and complexity.

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Talk:Jul 13 15:00
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